Fordatis Sammlung: https://fordatis.fraunhofer.de/handle/fordatis/47 2026-05-29T16:09:19Z Compact Model for a Silicon Single Electron Transistor in a Stacked Nanopillar - Implementations in HSPICE and EXCEL/VBA https://fordatis.fraunhofer.de/handle/fordatis/190.2 Titel: Compact Model for a Silicon Single Electron Transistor in a Stacked Nanopillar - Implementations in HSPICE and EXCEL/VBA Datenautorinnen und Datenautoren: Klüpfel, Fabian J.; Pichler, Peter Zusammenfassung: Within the European Project IONS4SET a compact model for a single electron transistor (SET) was developed. The SET is formed by a silicon nanodot embedded in a silicon dioxide layer between two highly doped silicon electrodes. Here, the implementation of the compact model in HSPICE is provided for circuit simulation. In addition, a VBA implementation into Excel is provided which can be used to calculate circuit characterisitcs and stability diagrams. 2021-01-01T00:00:00Z